Study of on-chip vias of resonant rotary traveling wave oscillators

The accelerated increment of operation frequencies in integrated circuits (ICs) in sub-micron technologies above GHz, makes that conventional clock signal distribution networks (H and X trees, spine, etc.) become obsolete due to the large number of lines and buffers that conform them, making them to have a high power consumption as well as high uncertainty time in the arrival of the clock signals to the sinks (registers, gates, blocks, etc.). Therefore, there have been sought alternatives capable to distribute clock signals with a reduced power consumption and minimum uncertainty in time (skew and jitter). The resonant networks are an excellent choice, since they take advantage of the parasitic elements (capacitances and inductances) present in transmission lines to generate oscillations, whereby, they are able to distribute clock signals at the same time that generate them; this causes the power consumption in these structures is less than for conventional networks [1]. One of the most promising resonant structure is the Rotary Traveling Wave Oscillator (RTWO), which is formed by a closed loop and a mobius termination to recirculate the energy as shown in [2]. Although these resonant structures have been extensively studied in recent years, few papers like [3] have focused on study the impact of the different physical shapes of these networks, such as the folds of the resonant ring, the spacing between lines that transport the signal (odd mode differential transmission lines), and the widths thereof.