DocumentCode :
1791494
Title :
Modeling, analysis and exploration of layers: A 3D computing architecture
Author :
Rakossy, Zoltan Endre
Author_Institution :
Inst. for Commun. Technol. & Embedded Syst. (ICE), RWTH Aachen Univ., Aachen, Germany
fYear :
2014
fDate :
6-8 Oct. 2014
Firstpage :
159
Lastpage :
160
Abstract :
A new layered reconfigurable architecture is proposed which exploits modularity, scalability and flexibility to achieve high energy efficiency and memory bandwidth. Functional Reconfiguration theoretical concepts are proposed to describe this kind of architectures, based on concepts from functional programming theory. A high-level design methodology is adapted and modified to allow easy design, testing and simulation. The architectural concepts are tested on an application domain and several tools are created to partially automate application mapping flow and system integration. Moreover, due to its inherent 3D structure of the proposed architecture, physical implementation into 3D silicon is attempted.
Keywords :
circuit simulation; energy conservation; functional programming; high level synthesis; integrated circuit design; integrated circuit modelling; integrated circuit testing; reconfigurable architectures; three-dimensional integrated circuits; 3D computing architecture; 3D silicon technology; 3D structure; application mapping flow; functional programming theory; functional reconfiguration theoretical concepts; high energy efficiency; high-level design methodology; layered reconfigurable architecture; memory bandwidth; system integration; Computer architecture; Hardware; Kernel; Program processors; Silicon; Solid modeling; Three-dimensional displays; 3D Architecture; ADL Modeling; Coarse-grained Reconfigurable Architecture (CGRA); Functional Architecture; Functional Reconfigurability; High-level Modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Very Large Scale Integration (VLSI-SoC), 2014 22nd International Conference on
Conference_Location :
Playa del Carmen
Type :
conf
DOI :
10.1109/VLSI-SoC.2014.7004167
Filename :
7004167
Link To Document :
بازگشت