A low-power 2nd-order CT ΔΣ modulator with an asynchronous SAR quantizer

Author

Radjen, Dejan ; Anderson, Matthew ; Sundstrom, Lars ; Andreani, Pietro

Author_Institution

Dept. of Electr. & Inf. Technol., Lund Univ., Lund, Sweden

fYear

2014

fDate

27-28 Oct. 2014

Firstpage

1

Lastpage

4

Abstract

This paper presents a multi-bit continuous-time ΔΣ modulator intended for ultra-low-power radios. The modulator features a 2nd-order loop filter implemented with a single operational amplifier to reduce the power consumption. Furthermore, a 4-bit asynchronous successive approximation register quantizer is used to achieve high resolution at a low oversampling ratio of 16. The ΔΣ modulator has been implemented in a 65 nm CMOS process. Simulation results show a peak SNDR of 65 dB over a 500 kHz signal bandwidth. The modulator consumes 69 /μW from a 800 mV power supply.

Keywords

CMOS integrated circuits; active filters; delta-sigma modulation; low-power electronics; operational amplifiers; quantisation (signal); CMOS process; asynchronous SAR quantizer; asynchronous successive approximation register quantizer; continuous time delta-sigma modulator; low-power delta-sigma modulator; operational amplifier; power 69 muW; second-order delta-sigma modulator; second-order loop filter; size 65 nm; voltage 800 mV; Bandwidth; Capacitors; Delays; Frequency modulation; Power demand;

fLanguage

English

Publisher

ieee

Conference_Titel

NORCHIP, 2014

Conference_Location

Tampere

Type

conf

DOI

10.1109/NORCHIP.2014.7004726

Filename

7004726