Compact models and model standard for 2.5D and 3D integration

3D integration is an emerging interconnect technology that can enable the continuation of performance scaling and the reduction of form factors. There are various approaches for 3D integration, including system-in-package (SiP), TSV-based 3D ICs, monolithic 3D ICs, and inductance/capacitance coupling 3D ICs, among which TSV-based 3D IC is the most promising one. This paper provides a summary of previous work on electrical modelings for 3D IC, with an emphasis on two key interconnect approaches: TSVs and RDLs. Based on prior work, we describe a compact model standard to facilitate a generic modeling approach for future 3D ICs.