DocumentCode
1792498
Title
Optimization of TIA topologies in a 65nm CMOS process
Author
Polster, Robert ; Gonzalez Jimenez, Jose Luis ; Cassan, Eric ; Vincent, Pierre
Author_Institution
LETI, CEA, Grenoble, France
fYear
2014
fDate
4-7 May 2014
Firstpage
117
Lastpage
118
Abstract
Transimpedance amplifiers (TIAs) are crucial elements in optical links. A, simulation supported, optimization study for different single ended TIAs was performed. Based on ST65nm CMOS technology, utilization scenario dependent solutions are presented.
Keywords
operational amplifiers; optical communication equipment; optical links; CMOS process; ST65nm CMOS technology; TIA topology optimization; optical links; single ended TIA; transimpedance amplifiers; utilization scenario dependent solutions; Bandwidth; Bit rate; Capacitance; Inverters; Power demand; Receivers; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Optical Interconnects Conference, 2014 IEEE
Conference_Location
San Diego, CA
Print_ISBN
978-1-4799-2467-7
Type
conf
DOI
10.1109/OIC.2014.6886107
Filename
6886107
Link To Document