DocumentCode
1793639
Title
A joint time synchronization concept for wireless communication system
Author
Setiawan, Hendra ; Kurosaki, Masayuki ; Ochi, Hiroshi
Author_Institution
Electr. Eng. Dept., Univ. Islam Indonesia, Yogyakarta, Indonesia
fYear
2014
fDate
20-21 Aug. 2014
Firstpage
255
Lastpage
259
Abstract
This paper presents a concept of common timing detection for three different wireless communication standards i.e. WLAN, WiMAX and LTE. We propose a system consists of sample rate conversion, symmetry-based auto-correlation, and peak detector. The correlation part consists of a single 256-tap symmetric-based auto-correlation circuit and a peak detector with an adaptive threshold value. The fixed point simulation results show that the proposed system has satisfied the minimum receiver sensitivity requirements that specified by the standards. Moreover, the proposed system has fitted for FPGA Virtex-5 XC5VTX240T implementation by utilizing 50 percent of total look up table (LUT) in the FPGA, and can reach the clock frequency up to 76.7MHz.
Keywords
Long Term Evolution; WiMax; correlation theory; field programmable gate arrays; peak detectors; sensitivity analysis; synchronisation; table lookup; wireless LAN; FPGA; LTE; LUT; Long Term Evolution; Virtex-5 XC5VTX240T; WLAN; WiMAX; adaptive threshold value; clock frequency; common timing detection; field programmable gate array; joint time synchronization concept; look up table; peak detector; receiver sensitivity requirement; sample rate conversion; symmetry-based auto-correlation circuit; wireless communication standard; wireless communication system; wireless local area network; Joints; Receivers; Registers; Synchronization; WiMAX; Wireless LAN;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Informatics: Concept, Theory and Application (ICAICTA), 2014 International Conference of
Conference_Location
Bandung
Print_ISBN
978-1-4799-6984-5
Type
conf
DOI
10.1109/ICAICTA.2014.7005950
Filename
7005950
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