Design and OPNET implementation of routing algorithm in 3D optical network on chip

As a nanometer level network-on-chip with the optical interconnection, the Optical Network-on-Chip (ONoC) was first proposed in 2006 in order to reduce the power consumption of the inter-chip communication. Because ONoC is typically characterized by low latency, high bandwidth and low power consumption, it has become more and more attractive. Compared with the 2-Dimensional (2D) design, the 3D integration technology has a higher packing density, a shorter wire length and the less power consumption. Therefore, the 3D ONoC will have the great potential in the future. In this paper, we first discuss and study the ONoC, and we then design the 3D mesh ONoC from the perspectives of topology, routing and communication protocol, with the help of 3D integration advantages. We setup a simulation platform by using OPNET in order to compare the performances of 2D and 3D mesh ONoCs in terms of the average delay and the data packet loss rate. The simulation results demonstrate that our 3D mesh ONoC is actually effective.