Segmental transmission line: Its practical application the optimized PCB trace design using a genetic algorithm

High signal integrity (SI) is an important aspect of the design of printed circuit boards (PCBs) with clock frequencies in the GHz range. Unfortunately, conventional PCB trace designs based on the matching of characteristic impedances do not work well with GHz digital signals. In order to overcome this difficulty, we previously proposed a novel PCB trace structure, the segmental transmission line (STL), in which the trace design is optimized using genetic algorithms (GAs). In this paper, we apply the STL to high-speed double data rate (DDR) memory-bus systems, backplane bus systems for basic servers, and high-density trace bus systems. We show that the performance of the STL on those real world applications has high SI by using real measurements on their prototypes.