DocumentCode
1797140
Title
A high-efficiency loop delay estimator in digital predistortion subsystem
Author
Shitao Zhu ; Anxue Zhang ; Zhuo Xu ; Xiaoli Dong
Author_Institution
Sch. of Electron. & Inf. Eng., Xi´an Jiaotong Univ., Xi´an, China
fYear
2014
fDate
9-13 July 2014
Firstpage
568
Lastpage
571
Abstract
A high-efficiency time delay estimation method is presented to obtain the accurate loop delay (including integer and fractional loop delay) between the input signal and the time delayed feedback signal in digital predistortion subsystem within the same process. Compared with the conventional, a sampling position adjusting scheme for complex signals using the piecewise-parabolic filter assisted by a steady decision criterion for limited data length achieves a significant reduction in time complexity and an improvement in loop delay estimation stability and precision. Results from simulations and experiments show that the proposed method is high-efficiency and valid.
Keywords
computational complexity; delays; signal processing; stability; complex signals; digital predistortion subsystem; fractional loop delay; high-efficiency loop delay estimator; high-efficiency time delay estimation method; integer loop delay; loop delay estimation stability; piecewise-parabolic filter; sampling position adjusting scheme; steady decision criterion; time complexity; time delayed feedback signal; Correlation; Delay effects; Delay estimation; Estimation; Predistortion; Time delay estimation; digital predistortion subsystem; piecewise-parabolic filter;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal and Information Processing (ChinaSIP), 2014 IEEE China Summit & International Conference on
Conference_Location
Xi´an
Print_ISBN
978-1-4799-5401-8
Type
conf
DOI
10.1109/ChinaSIP.2014.6889307
Filename
6889307
Link To Document