Hardware realization of locally normalized cross correlation algorithm

Real-time mission planning for Unmanned Aerial Vehicles (UAVs) is an important application that requires implementation of computer vision algorithms such as Locally Normalized Cross Correlation (LNCC), with greater accuracy and throughput. Although the LNCC algorithm is the prime choice for image matching, its real time hardware implementation has proved to be a real challenge for hardware designers mainly due to its computational complexity. In this paper, a novel architecture for real time implementation of this scheme using Field Programmable Gate Array (FPGA) platform is proposed. In the proposed design, multiple computations are concurrently executed by incorporating parallelism in architectures through 4 FPGAs. The FPGAs are efficiently multiple synchronized along with efficient memory architecture to optimize match point results in minimum possible time. The exploration of the parallelism and reusability of results made it possible to meet timing constraints imposed in this research.