• DocumentCode
    1798963
  • Title

    Efficient hardware design of Forward and Inverse Walsh-Hadamard transform

  • Author

    Bolanos-Jojoa, J.D. ; Espinosa-Duran, J.M. ; Velasco-Medina, J.

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Univ. del Valle, Cali, Colombia
  • fYear
    2014
  • fDate
    17-19 Sept. 2014
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    This work presents two efficient hardware implementations of Forward and Inverse 2D-Walsh-Hadamard Transforms that do not use memory for the transposition operation. The first one is based on wired-transposition and the second one does not require transposition. In the last case, we designed a large 1D-WHT in order to obtain a 2D transform. The architectures were completely described in VHDL and they are flexible and parameterizable from the viewpoint of the number of inputs (N) and the number of bits of each input (n). The results show that the proposed designs have a very high throughput which makes them very suitable for several image and video processing applications and embedded systems based on H.264.
  • Keywords
    Hadamard transforms; data compression; embedded systems; video coding; 1D-WHT; H.264 coding; embedded systems; forward Walsh-Hadamard transform; image processing; inverse Walsh-Hadamard transform; transposition operation; video processing; Adders; Conferences; Hardware; Standards; Throughput; Transforms; Video coding; H.264; Hardware Implementation; High Definition Video; Image and Video Processing; Walsh-Hadamard Transform;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Image, Signal Processing and Artificial Vision (STSIVA), 2014 XIX Symposium on
  • Conference_Location
    Armenia
  • Type

    conf

  • DOI
    10.1109/STSIVA.2014.7010174
  • Filename
    7010174