DocumentCode :
1799876
Title :
FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems
Author :
Jishen Zhao ; Mutlu, Onur ; Yuan Xie
fYear :
2014
fDate :
13-17 Dec. 2014
Firstpage :
153
Lastpage :
165
Abstract :
Byte-addressable nonvolatile memories promise a new technology, persistent memory, which incorporates desirable attributes from both traditional main memory (byte-addressability and fast interface) and traditional storage (data persistence). To support data persistence, a persistent memory system requires sophisticated data duplication and ordering control for write requests. As a result, applications that manipulate persistent memory (persistent applications) have very different memory access characteristics than traditional (non-persistent) applications, as shown in this paper. Persistent applications introduce heavy write traffic to contiguous memory regions at a memory channel, which cannot concurrently service read and write requests, leading to memory bandwidth underutilization due to low bank-level parallelism, frequent write queue drains, and frequent bus turnarounds between reads and writes. These characteristics undermine the high-performance and fairness offered by conventional memory scheduling schemes designed for non-persistent applications. Our goal in this paper is to design a fair and high-performance memory control scheme for a persistent memory based system that runs both persistent and non-persistent applications. Our proposal, FIRM, consists of three key ideas. First, FIRM categorizes request sources as non-intensive, streaming, random and persistent, and forms batches of requests for each source. Second, FIRM strides persistent memory updates across multiple banks, thereby improving bank-level parallelism and hence memory bandwidth utilization of persistent memory accesses. Third, FIRM schedules read and write request batches from different sources in a manner that minimizes bus turnarounds and write queue drains. Our detailed evaluations show that, compared to five previous memory scheduler designs, FIRM provides significantly higher system performance and fairness.
Keywords :
parallel processing; random-access storage; scheduling; system buses; FIRM; bank-level parallelism; bus turnaround; byte-addressable nonvolatile memories; contiguous memory region; data duplication; data persistence; fair memory control; high-performance memory control; memory access characteristics; memory bandwidth utilization; memory channel; memory scheduler design; memory scheduling scheme; ordering control; persistent memory systems; write queue drain; write requests; write traffic; Bandwidth; Computer crashes; Delays; Memory management; Nonvolatile memory; Parallel processing; Random access memory; data persistence; fairness; memory interference; memory scheduling; nonvolatile memory; persistent memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microarchitecture (MICRO), 2014 47th Annual IEEE/ACM International Symposium on
Conference_Location :
Cambridge
ISSN :
1072-4451
Type :
conf
DOI :
10.1109/MICRO.2014.47
Filename :
7011385
Link To Document :
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