DocumentCode :
1799907
Title :
BuMP: Bulk Memory Access Prediction and Streaming
Author :
Volos, Stavros ; Picorel, Javier ; Falsafi, Babak ; Grot, Boris
fYear :
2014
fDate :
13-17 Dec. 2014
Firstpage :
545
Lastpage :
557
Abstract :
With the end of Den nard scaling, server power has emerged as the limiting factor in the quest for more capable data enters. Without the benefit of supply voltage scaling, it is essential to lower the energy per operation to improve server efficiency. As the industry moves to lean-core server processors, the energy bottleneck is shifting toward main memory as a chief source of server energy consumption in modern data enters. Maximizing the energy efficiency of today´s DRAM chips and interfaces requires amortizing the costly DRAM page activations over multiple row buffer accesses. This work introduces Bulk Memory Access Prediction and Streaming, or BuMP. We make the observation that a significant fraction (59-79%) of all memory accesses fall into DRAM pages with high access density, meaning that the majority of their cache blocks will be accessed within a modest time frame of the first access. Accesses to high-density DRAM pages include not only memory reads in response to load instructions, but also reads stemming from store instructions as well as memory writes upon a dirty LLC eviction. The remaining accesses go to low-density pages and virtually unpredictable reference patterns (e.g., Hashed key lookups). BuMP employs a low-cost predictor to identify high-density pages and triggers bulk transfer operations upon the first read or write to the page. In doing so, BuMP enforces high row buffer locality where it is profitable, thereby reducing DRAM energy per access by 23%, and improves server throughput by 11% across a wide range of server applications.
Keywords :
DRAM chips; cache storage; computer centres; paged storage; power aware computing; BuMP; DRAM chips; DRAM energy per access; DRAM page activations; Dennard scaling; bulk memory access prediction; bulk memory access streaming; bulk transfer operations; dirty LLC eviction; energy efficiency; high-density DRAM pages; lean-core server processors; low-density pages; multiple row buffer access; server efficiency; server energy consumption; server power; supply voltage scaling; virtually unpredictable reference patterns; Energy efficiency; Indexes; Memory management; Program processors; Random access memory; Servers; DRAM; energy efficiency; memory streaming; row buffer;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microarchitecture (MICRO), 2014 47th Annual IEEE/ACM International Symposium on
Conference_Location :
Cambridge
ISSN :
1072-4451
Type :
conf
DOI :
10.1109/MICRO.2014.44
Filename :
7011416
Link To Document :
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