A micropower log domain FGMOS filter

Author

Rodríguez-Villegas, Esther O. ; Rueda, Adoración ; Yúfera, Alberto

Author_Institution

Instituto de Microelectron. de Sevilla (IMSE-CNM), Seville Univ., Spain

Volume

3

fYear

2002

fDate

2002

Abstract

In this paper, a CMOS implementation of a low voltage micropower logarithmic biquad based on floating gate MOS transistors (FGMOS) is presented. The translinear principle applied to the floating gate MOS transistor leads to an easy implementation of the state-space equations without using the source terminal in the loop. The voltage supply can be reduced and also there is no need of separate wells. The technique is proven in this low/band pass filter working at 1 V with a maximum power consumption of 2 μW. The filter parameters can be adjusted in more than two decades, being the upper frequency around 150 kHz.

Keywords

CMOS analogue integrated circuits; biquadratic filters; low-power electronics; state-space methods; 1 V; 150 kHz; 2 muW; CMOS implementation; filter parameters; floating gate MOS transistors; low voltage micropower logarithmic biquad; micropower log domain FGMOS filter; state-space equations; translinear principle; Band pass filters; Batteries; Capacitance; Circuits; Energy consumption; Equations; Frequency; Limiting; Low voltage; MOSFETs;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010224

Filename

1010224