DocumentCode :
1800712
Title :
Design of a power optimal reversible FIR filter for speech signal processing
Author :
Padmapriya, S. ; Lakshmi, V. Prabha
Author_Institution :
Dept. of ECE, Gov. Coll. of Technol., Coimbatore, India
fYear :
2015
fDate :
8-10 Jan. 2015
Firstpage :
1
Lastpage :
6
Abstract :
In this paper, an efficient architecture of FIR filter structure is presented. For achieving low power, reversible logic mode of operation is implemented in the design. Area overhead is the tradeoff in the proposed design. From the synthesis results, the proposed low power FIR filter architecture offers 18.1 % of power saving when compared to the conventional design. The area overhead is 2.6% for the proposed architecture.
Keywords :
FIR filters; speech processing; area overhead; low power FIR filter architecture; power optimal reversible FIR filter design; reversible logic mode; speech signal processing; Adders; Delays; Finite impulse response filters; Logic gates; Radiation detectors; Speech; FIR filter; Low power; Speech samples; reversible logic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Communication and Informatics (ICCCI), 2015 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-6804-6
Type :
conf
DOI :
10.1109/ICCCI.2015.7218147
Filename :
7218147
Link To Document :
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