A single ended write double ended read decoupled 8-T SRAM cell with improved read stability and writability

Author

Pal, Soumitra ; Arif, Shahnawaz

Author_Institution

Electron. & Commun. Eng., Birla Inst. of Technol., Ranchi, India

fYear

2015

fDate

8-10 Jan. 2015

Firstpage

1

Lastpage

4

Abstract

In this paper a single ended write double ended read decoupled SRAM cell is proposed. Design metrics of the proposed cell are examined and compared with conventional 6-T. Proposed SRAM cell offer improvement during both read and write operation in terms of speed. It offers 2.95× shorter read delay. It exhibits 2.74× and 7.84× shorter write delay during write-1 and write-0 respectively. The proposed cell also shows improvement in read stability and writability. It offers 5.07× higher RSNM (read static noise margin). It shows 4.08% improvement in WSNM (write static noise margin) @ 300 mV compared to conventional 6-T.

Keywords

SRAM chips; circuit stability; integrated circuit design; RSNM; WSNM; design metrics; improved read stability; read delay; read static noise margin; single ended write double ended read decoupled 8-T SRAM cell; voltage 300 mV; write delay; write static noise margin; Circuit stability; Delays; Noise; SRAM cells; Stability analysis; Transistors; Wireless sensor networks; CMOS; Read Delay; Read Stability; Writability; Write Delay;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Communication and Informatics (ICCCI), 2015 International Conference on

Conference_Location

Coimbatore

Print_ISBN

978-1-4799-6804-6

Type

conf

DOI

10.1109/ICCCI.2015.7218157

Filename

7218157