Title :
Precise behavioural modelling of high-resolution switched-capacitor delta-sigma modulators
Author :
Zare-Hoseini, Hashem ; Shoaei, Omid ; Kale, Izzet
Author_Institution :
Dept. of Electron. Syst., Westminster Univ., London, UK
Abstract :
A precise behavioral modelling of switched-capacitor ΔΣ modulators is presented. Considering noise (switch and op-amp thermal noise), clock jitter, nonidealities of integrators and op-amps including finite DC gain (DCG) and unity gain bandwidth (UGBW), slew-limiting, DCG nonlinearities and the input parasitic capacitance, exhaustive behavioral simulations that are close models of the transistor level ones can be performed. Evaluation and validation of the models was done via behavioral simulations for a second-order modulator using SIMULINK. The effects of the nonidealities and nonlinearities are clearly seen when compared to the ideal modulator.
Keywords :
circuit noise; delta-sigma modulation; network analysis; switched capacitor networks; thermal noise; timing jitter; ADC behavioural modelling; circuit nonlinearity; clock jitter; correlated-double-sampling; finite DC gain; high-resolution delta-sigma modulators; input parasitic capacitance; integrator nonidealities; op-amp noise; second-order modulator; slew-limiting; switch noise; switched-capacitor delta-sigma modulators; thermal noise; unity gain bandwidth; 1f noise; CMOS technology; Capacitance; Clocks; Delta modulation; Jitter; Noise level; Operational amplifiers; Performance gain; Transfer functions;
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2004. IMTC 04. Proceedings of the 21st IEEE
Print_ISBN :
0-7803-8248-X
DOI :
10.1109/IMTC.2004.1351272
