• DocumentCode
    1801906
  • Title

    Application of simulated annealing to cluster-boundary search algorithm for macrocell placement optimization

  • Author

    Mir, Mustahsan

  • Author_Institution
    Dept. of Electr. Eng., Ajman Univ. of Sci. & Technol., Ajman, United Arab Emirates
  • fYear
    2010
  • fDate
    11-12 May 2010
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper presents a hybrid technique for macrocell placement optimization. The presented technique integrates the probabilistic hill-climbing feature of simulated annealing with the (deterministic) cluster-boundary search algorithm in order to minimize the likelihood of local optimal solutions. It optimizes the placement as well as orientation of macrocells and produces overlap-free designs satisfying constraints on interconnect length bounds. The technique is computationally efficient and can generate high-quality solutions for large-sized placement problems. Test results for placement optimization problems involving up to 100 macrocells are presented and analyzed to determine the effectiveness of the presented hybrid technique.
  • Keywords
    VLSI; integrated circuit layout; simulated annealing; cluster-boundary search algorithm; interconnect length bounds; large-sized placement problems; macrocell orientation; macrocell placement optimization; overlap-free designs; probabilistic hill-climbing feature; simulated annealing; Algorithm design and analysis; Cost function; Design automation; Integrated circuits; Macrocell networks; Simulated annealing; VLSI floorplan design; computer-aided design; hybrid techniques; placement optimization; simulated annealing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer and Communication Engineering (ICCCE), 2010 International Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    978-1-4244-6233-9
  • Type

    conf

  • DOI
    10.1109/ICCCE.2010.5556748
  • Filename
    5556748