• DocumentCode
    1802571
  • Title

    A study on circuit switching merits in the design of network-on-chip

  • Author

    Chin-Ee, New ; Soin, Norhayati

  • Author_Institution
    Dept. of Electr. Eng., Univ. of Malaya, Kuala Lumpur, Malaysia
  • fYear
    2010
  • fDate
    11-12 May 2010
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    The advancement of semiconductor industry has led to continuously increasing level of integration. Due to this and driven by shorter time-to-market and product life cycle, the industry has migrated into SoC paradigm. NoC is viewed as a practical solution for SoC interconnection due to its reusability and scalability. Existing NoC designs are mainly based on packet switching. However, packet switching NoC requires significant buffering resources, which consumes silicon area and power. An alternative to packet switching is circuit switching based NoC. In this paper, circuit and packet switching had been evaluated, and simulations were performed to measure and compare the performance of both NoCs to determine the viability of CNoC as on-chip interconnection solution.
  • Keywords
    circuit switching; integrated circuit design; integrated circuit interconnections; network-on-chip; packet switching; CNoC; NoC design; SoC interconnection; SoC paradigm; buffering resources; circuit switching merits; network-on-chip; on-chip interconnection solution; packet switching; Integrated circuit interconnections; Magnetic cores; Object oriented modeling; Packet switching; Switches; Switching circuits; System-on-a-chip; formatting; style; styling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer and Communication Engineering (ICCCE), 2010 International Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    978-1-4244-6233-9
  • Type

    conf

  • DOI
    10.1109/ICCCE.2010.5556775
  • Filename
    5556775