Design and implementation of a QoS router on FPGA

Router is the key unit of Network-on-Chip and there are many implementations of router for on chip network, but few of them provide QoS service. In this paper, we have exploited a QoS router based on a hybrid switching mechanism. By using the circuit-switching, the router can provide guaranteed services, at the same time it makes the most use of the remained network resources to provide best effort services with the wormhole-switching. What´s more, to be able to implement it on chip lastly, we select the XC5VLX110T chip to establish a verification platform on RTL-level, also with some necessary analysis and verification. The synthesis of the router shows it consumes 1% of the chip´s storage resources and 6% of the logic resources, and its maximum operating frequency is up to 155.441MHz when the width of the wire is set to be 8bit and the depth of buffer to be 16 flits.