A tick based methodology for rapid predictive circuit modeling

Author

Murali, Raghunath ; Austin, Blanca L. ; Meindl, James D.

Author_Institution

Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA

Volume

3

fYear

2002

fDate

2002

Firstpage

791

Lastpage

794

Abstract

The trend toward device miniaturization makes it necessary to scan a wide range of supply and threshold voltages and different types of FETs, so that optimal performance is obtained. Such a scan is best done by physically based models, so that predictive circuit modeling can be done to project and optimize circuit performance well into the next decade. Circuit simulators like HSPICE cannot be used for predictive modeling and thus a methodology is needed to use existing FET physical models to predict circuit performance. Such a methodology is proposed in this paper and verified against HSPICE. The proposed method works for a wide range of supply voltages, for a variety of FETs and avoids any numerical integration

Keywords

SPICE; circuit optimisation; field effect transistors; integrated circuit design; integrated circuit modelling; semiconductor device models; FET physical models; FET supply voltage; FET threshold voltage; HSPICE circuit simulators; circuit performance optimization; circuit performance prediction; numerical integration; physically based model scanning; rapid predictive circuit modeling; supply voltage range; tick based modeling methodology; Circuit optimization; Circuit simulation; Delay; Equations; FETs; Inverters; Microelectronics; Predictive models; Semiconductor device modeling; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Conference_Location

Phoenix-Scottsdale, AZ

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010343

Filename

1010343