Title :
Floating-gate EEPROM cell model based on MOS model 9
Author :
Portal, J.M. ; Forli, L. ; Née, D.
Author_Institution :
Lab. Materiaux et Microelectronique de Provence, CNRS, Marseille, France
Abstract :
The objective of this paper is to present an electrically erasable programmable read only memory cell model for static and transient simulations. As a core element of this model, a MM9 model has been used coupled with the charges´ neutrality expression in the structure. The charges´ neutrality, including the charges trapped on the floating gate, is applied to determine the potential on the floating gate. From the floating gate potential, related to the terminal voltages, the drain current and the different charges present in the cell structure are calculated with the MM9 formulation. Moreover, this pragmatic model takes into account the geometric dependences of the cell. This model has been successfully implemented in Eldo.
Keywords :
EPROM; MOS memory circuits; circuit simulation; electric charge; integrated circuit design; integrated circuit modelling; integrated memory circuits; transient analysis; EEPROM floating-gate cell model; Eldo circuit simulator models; MM9 model core element; MOS model 9; cell geometric dependences; cell structure charges; drain current; electrically erasable programmable read only memory cell model; floating gate potential; floating gate trapped charges; static simulations; structure charge neutrality expression; terminal voltages; transient simulations; Circuit simulation; Communication system control; EPROM; Electron traps; Nonvolatile memory; Semiconductor memory; Solid modeling; Threshold voltage; Tunneling; Voltage control;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010345
