Area efficient CMOS integrated charge pumps

Author

Tianrui Fing ; Ki, Wing-Hung ; Chan, Mansun

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China

Volume

3

fYear

2002

fDate

2002

Firstpage

831

Lastpage

834

Abstract

Area-efficient 4× charge pumps based on a cross-coupled structure that re-uses the 2× output to save 2 level shift circuits, 2 power transistors and 1 capacitor are presented. With an input of 2.5 V, the 4× single-cell charge pump delivers a load current of 100 μA with an output voltage of 9.8 V and a ripple voltage of 0.5 mV. The output can be regulated to 9.1 V with an integrated low dropout regulator. The ripple voltage is 0.1 mV and the efficiency is 82%. Both circuits are designed using a 0.8 μm CMOS P-well high voltage process

Keywords

CMOS analogue integrated circuits; DC-DC power convertors; driver circuits; power integrated circuits; voltage regulators; 0.8 micron; 100 muA; 2.5 V; 82 percent; 9.1 V; 9.8 V; CMOS; DC-DC converter; P-well high voltage process; cross-coupled structure; efficiency; level shift circuits; load current; low dropout regulator; output voltage; ripple voltage; single-cell charge pump; Capacitors; Charge pumps; Circuits; Clocks; MOS devices; Power transistors; Regulators; Topology; Turning; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Conference_Location

Phoenix-Scottsdale, AZ

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010353

Filename

1010353