Title :
Rapid prototyping platform for stream-oriented reconfigurable computing applications
Author :
Bourennane, El-Bay ; Brunet, Philippe
Author_Institution :
LE2I Lab., Univ. of Burgundy, Dijon, France
Abstract :
In this paper we present a methodology and tool for rapid prototyping of real time image processing applications. We describe our design flow of multiprocessor system on chip (MPSoC) architectures based on hardware/software components. This methodology provides automated methods to specify, generate the hardware, software, and the architectural interfaces between them. Our methodology starts from system level specification of the application with parallel processes described in C-code. The processes communicate through an abstract channel called streams. We describe also the solution that we proposed to synthesize a custom bus architecture for the reconfigurable computing applications, which therefore allows minimizing hardware cost in the FPGA. On the other hand, this methodology allows generating the communication architecture based on the needs of the application. Finally, we demonstrate the effectiveness of our approach through an image processing application.
Keywords :
field programmable gate arrays; image processing; multiprocessing systems; reconfigurable architectures; system-on-chip; C-code; FPGA; MPSoC architectures; architectural interfaces; hardware/software components; multiprocessor system on chip; rapid prototyping platform; real time image processing; stream-oriented reconfigurable computing applications; Computer architecture; Field programmable gate arrays; Hardware; Image edge detection; Program processors; MPSoC; communication synthesis; rapid prototyping; real time image processing;
Conference_Titel :
Computer and Communication Engineering (ICCCE), 2010 International Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-6233-9
DOI :
10.1109/ICCCE.2010.5556817