DocumentCode :
180435
Title :
Enabling Power-Efficient Designs with III-V Tunnel FETs
Author :
Moon Seok Kim ; Huichu Liu ; Swaminathan, Karthik ; Xueqing Li ; Datta, Soupayan ; Narayanan, Vijaykrishnan
Author_Institution :
Pennsylvania State Univ., University Park, PA, USA
fYear :
2014
fDate :
19-22 Oct. 2014
Firstpage :
1
Lastpage :
4
Abstract :
III-V Tunnel FETs (TFET) possess unique characteristics such as steep slope switching, high gm/IDS, uni-directional conduction, and low voltage operating capability. These characteristics have the potential to result in energy savings in both digital and analog applications. In this paper, we provide an overview of the power efficient properties of III-V TFETs and designs at the device, circuit and architectural level.
Keywords :
III-V semiconductors; field effect transistors; low-power electronics; tunnel transistors; III-V tunnel FET; TFET; analog applications; digital applications; energy savings; low voltage operating capability; power efficient designs; steep slope switching; unidirectional conduction; CMOS integrated circuits; Field effect transistors; Noise; Program processors; Silicon; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compound Semiconductor Integrated Circuit Symposium (CSICs), 2014 IEEE
Conference_Location :
La Jolla, CA
Type :
conf
DOI :
10.1109/CSICS.2014.6978551
Filename :
6978551
Link To Document :
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