• DocumentCode
    1804955
  • Title

    A 7b 1.4GS/s ADC with offset drift suppression techniques for one-time calibration

  • Author

    Nakajima, Yuji ; Kato, Norihito ; Sakaguchi, Akemi ; Ohkido, Toshio ; Shimomaki, Kenji ; Masuda, Hiroko ; Shiroma, Chikahiro ; Yotsuyanagi, Michio ; Miki, Takahiro

  • fYear
    2012
  • fDate
    9-12 Sept. 2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A 7b 1.4 GS/s flash ADC is developed in 45 nm CMOS. This is the first paper of an ADC with offset drift suppression techniques for dynamic comparator and preamplifier. These techniques make the ADC robust against environmental variation. As a result, once the ADC is calibrated at power up, no more calibration is necessary even under VDD or temperature variations. The ADC occupies a small area of 0.085 mm2 and dissipates 33.24 mW at 1.4 GS/s from a 1.15V supply.
  • Keywords
    CMOS digital integrated circuits; analogue-digital conversion; comparators (circuits); preamplifiers; CMOS; VDD; dynamic comparator; environmental variation; flash ADC; offset drift suppression techniques; one-time calibration; power 33.24 mW; preamplifier; size 45 nm; temperature variations; voltage 1.15 V; Ash; Calibration; Clocks; Radiation detectors; Temperature dependence; Temperature measurement; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference (CICC), 2012 IEEE
  • Conference_Location
    San Jose, CA
  • ISSN
    0886-5930
  • Print_ISBN
    978-1-4673-1555-5
  • Electronic_ISBN
    0886-5930
  • Type

    conf

  • DOI
    10.1109/CICC.2012.6330608
  • Filename
    6330608
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1804955