FPGA implementation of wireless communication system

A high data reliability for high-speed transmission of LDPC-OFDM wireless communication system architecture is proposed with the implementation plan by the field programmable gate array(FPGA). Using the orthogonal properties of OFDM sub-channels can be transmitted over a combination of coding and decoding LDPC codes in the high performance, will achieve good results in communication system. The LDPC-OFDM system is implemented by the second generation of Altera corporation with the EP2C35 device Cyclone II. The FPGA implementation results show that the data transmission performance is good and the data throughput is wide and the decoder can achieve a maximum decoding throughput of 10Mb/s at 15 iterations, it can meet the high-speed wireless communication system.