Clock-gated harmonic rejection mixers

In this paper, harmonic-rejection mixers (HRM) in which incoming radio frequency (RF) signal is multiplied by square-wave local-oscillator (LO) output, are described. Starting with the generalization of the conventional HRM concept, a technique to reject higher order harmonics, above the third and fifth, is presented. After a brief description of the conventional HRM and its limitations, an improved HRM that achieves a higher level of harmonic rejection (HR) for higher order harmonics as well, is described. By using a clock N times the desired LO frequency, this scheme rejects the (N-1)^th LO harmonic only by an amount of 20log(N - 1) dB. A new technique is presented that achieves 19 dB better HR for the (N - 1)^th harmonic while preserving the level of rejection for other harmonics. Mixer embodying this technique is fabricated in 55 nm standard CMOS process and measured results are discussed. Flicker noise cancellation and HR performance achieved are examined for this new topology. This mixer rejects the (N - 1)^th harmonic in excess of 39 dB for N = 4 while achieving greater than 52 dB of rejection for other harmonics.