Title :
Wire sizing optimization for buffered global interconnects
Author :
Tang, Min ; Mao, Junfa
Author_Institution :
Dept. of Electron. Eng., Shanghai Jiao Tong Univ., Shanghai
Abstract :
This paper presents a novel methodology to achieve the optimal wire sizing of buffered global interconnects. Based on the model of optimal repeater insertion, the impact of the line width and spacing on performance, such as delay, power dissipation and area, is investigated. The power-delay product is therefore defined as a figure of merit (FOM). An analytical expression for the optimal line width is presented. The effects of the weight factor and constrained coefficient on performance are investigated and some useful guidelines for wire sizing of global interconnects are proposed.
Keywords :
circuit optimisation; integrated circuit interconnections; buffered global interconnects; figure of merit; optimal line width; optimal repeater insertion; optimal wire sizing; power dissipation; power-delay product; wire sizing optimization; Capacitance; Constraint optimization; Delay; Dielectrics; Guidelines; Integrated circuit interconnections; Optimization methods; Power dissipation; Repeaters; Wire;
Conference_Titel :
Microwave and Millimeter Wave Technology, 2008. ICMMT 2008. International Conference on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4244-1879-4
Electronic_ISBN :
978-1-4244-1880-0
DOI :
10.1109/ICMMT.2008.4540430
