Simulation of marked graphs on SIMD architectures using efficient memory management

Author

Sellami, Hatem ; Allen, James D. ; Schimmel, David E. ; Yalamanchili, Sudhakar

Author_Institution

Georgia Inst. of Technol., Atlanta, GA, USA

fYear

1994

fDate

31 Jan-2 Feb 1994

Firstpage

343

Lastpage

348

Abstract

This paper describes and evaluates the performance of an implementation of a parallel discrete event simulation of a class of Petri nets known as marked graphs on a single instruction stream multiple data stream (SIMD) architecture. The implementation uses an efficient, novel memory management technique for supporting abstract data types, where memory can be dynamically allocated/deallocated on an individual PE basis. Performance evaluations are reported for a number of “real world” applications

Keywords

Petri nets; abstract data types; discrete event simulation; mathematics computing; parallel processing; performance evaluation; storage allocation; storage management; Petri nets; SIMD architecture; abstract data types; efficient memory management; marked graph simulation; memory allocation; memory deallocation; memory management; parallel discrete event simulation; performance evaluations; single instruction stream multiple data stream; Computational modeling; Computer aided instruction; Computer architecture; Concurrent computing; Data structures; Discrete event simulation; Memory architecture; Memory management; Resource management; Technology management;

fLanguage

English

Publisher

ieee

Conference_Titel

Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, 1994., MASCOTS '94., Proceedings of the Second International Workshop on

Conference_Location

Durham, NC

Print_ISBN

0-8186-5292-6

Type

conf

DOI

10.1109/MASCOT.1994.284401

Filename

284401