Figure of merit based design strategy for low-power continuous-time ΣΔ modulators

Author

Gerfers, Friedel ; Soh, Kian Min ; Ortmanns, Maurits ; Manoli, Yiannos

Author_Institution

Inst. of Microelectron., Univ. of Saarland, Saarbrucken, Germany

Volume

4

fYear

2002

fDate

2002

Abstract

This paper presents a novel design strategy for low-power continuous-time (CT) ΣΔ modulators. The figure of merit (FOM) is used to find the optimal ΣΔ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil a rapid prototyping approach on the other hand. This method compares the power efficiency of different modulator structures and modulator orders with respect to the given design specifications. The efficiency of this strategy is shown by measurement results of a 1.5V 3^rd order CT modulator.

Keywords

circuit optimisation; continuous time systems; integrated circuit design; low-power electronics; sigma-delta modulation; 1.5 V; CT modulator; figure of merit based design strategy; low-power continuous-time ΣΔ modulators; modulator orders; modulator structures; optimal ΣΔ modulator implementation; power consumption; power efficiency; rapid prototyping approach; Bandwidth; CMOS logic circuits; Capacitors; Delta modulation; Dynamic range; Energy consumption; Magneto electrical resistivity imaging technique; Microelectronics; Power amplifiers; Prototypes;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010432

Filename

1010432