Research and design of timing on source synchronous clock system based on Hyperlynx

With the rapid increase of system clock frequency, the issue of timing in the high speed digital design is playing a more important role. To ensure the stable operation of digital system, the accurate timing analysis and constraint should be run at the beginning of PCB design. Detailed analysis of the timing of source synchronous system is described in the paper. Besides, simulation optimization and timing analysis of signal integrity of an embedded system are performed using the tool of Hyperlynx of Mentor Graphics Corporation. The procedure can be also applied to the timing design of other high speed digital systems.