Title :
A Routing Architecture for Mapping Dataflow Graphs at Run-Time
Author :
Koch, Dirk ; Torresen, Jim
Author_Institution :
Dept. of Inf., Univ. of Oslo, Oslo, Norway
Abstract :
While it is feasible with today´s commercial tools to swap from one module to another, many applications demand more advanced configuration schemes, for example, to map different dataflow graphs onto an FPGA. To support this, we will improve an existing on-FPGA communication architecture in order to carry out arbitrary routing among multiple freely placed modules. This results in a circuit switching network that will be efficiently implemented directly within the FPGA routing fabric.
Keywords :
data flow graphs; field programmable gate arrays; network routing; FPGA communication architecture; advanced configuration schemes; circuit switching network; mapping dataflow graphs; routing architecture; Fabrics; Field programmable gate arrays; Multiplexing; Routing; Switches; Table lookup; Wires; Circuit-Switching; FPGA; Partial Reconfiguration; online communication;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2011 International Conference on
Conference_Location :
Chania
Print_ISBN :
978-1-4577-1484-9
Electronic_ISBN :
978-0-7695-4529-5
DOI :
10.1109/FPL.2011.58
