A 2.3nJ/frame Voice Activity Detector based audio front-end for context-aware System-on-Chip applications in 32nm CMOS

Author

Raychowdhury, Arijit ; Tokunaga, Carlos ; Beltman, Willem ; Deisher, Michael ; Tschanz, James ; De, Vivek

Author_Institution

Intel Labs., Intel, Hillsboro, OR, USA

fYear

2012

fDate

9-12 Sept. 2012

Firstpage

1

Lastpage

4

Abstract

An audio front-end with Voice Activity Detection (VAD) hardware targeted for low-power embedded SoCs, featuring a 512pt FFT, programmable filters, noise floor estimator and a decision engine has been fabricated in 32nm CMOS. The dual-V_CC, dual-frequency design allows the core datapath to scale to near-threshold voltage, where power consumption is less than 50μW. At peak energy efficiency, the core can process audio data at 2.3nJ/frame - a 9.4X improvement over nominal voltage conditions.

Keywords

CMOS integrated circuits; audio signal processing; digital signal processing chips; system-on-chip; voice communication; CMOS; FFT; audio front-end; context-aware system-on-chip; decision engine; dual-VCC; low-power embedded SoC; noise floor estimator; programmable filters; size 32 nm; voice activity detector; Energy efficiency; Estimation; Filtering; Floors; Noise; Speech recognition; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2012 IEEE

Conference_Location

San Jose, CA

ISSN

0886-5930

Print_ISBN

978-1-4673-1555-5

Electronic_ISBN

0886-5930

Type

conf

DOI

10.1109/CICC.2012.6330651

Filename

6330651