DocumentCode
1806273
Title
A vector based fast block motion estimation algorithm for implementation on SIMD architectures
Author
Duanmu, C.J. ; Ahmad, M.O. ; Swamy, M.N.S. ; Shatnawi, A.
Author_Institution
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Volume
4
fYear
2002
fDate
2002
Abstract
In this paper, a fast block motion estimation algorithm that not only accelerates the process of the motion estimation but also maintains the same accuracy as that of the full search algorithm is proposed. In modern CPUs, the single instruction multiple data (SIMD) technique is commonly used to provide an execution speedup of up to eight fold. The proposed algorithm satisfies the requirements of (i) the easy computation of the lower bounds of the block matching error, and (ii) their storage in a contiguous memory space for its SIMD implementation. Simulation results show that the proposed algorithm is more than 40 times faster than the full search algorithm while keeping the accuracy of the latter.
Keywords
image matching; motion estimation; parallel architectures; vector processor systems; SIMD architectures; accuracy; block matching error; contiguous memory space; execution speedup; single instruction multiple data; vector based fast block motion estimation; Acceleration; Computational modeling; Computer architecture; MPEG 4 Standard; Maintenance engineering; Modems; Motion estimation; Parallel processing; Signal processing algorithms; Video coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN
0-7803-7448-7
Type
conf
DOI
10.1109/ISCAS.2002.1010459
Filename
1010459
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