Title :
A digital PLL with two-step closed-locking for multi-mode/multi-band SAW-less transmitter
Author :
Ueda, Keisuke ; Uozumi, Toshiya ; Endo, Ryo ; Nakamura, Takahiro ; Heima, Tetsuya ; Sato, Hisayasu
Author_Institution :
Renesas Electron. Corp., Itami, Japan
Abstract :
This paper presents a digital phase locked loop (DPLL) with two-step closed-locking technique. The two-step locking allows us to use a simple phase detector, which achieves wide phase detect range and has no complex circuits for glitch compensation. The DPLL has three digital controlled oscillators (DCO) for multi-mode/multi-band operation. The DPLL covers GSM quad-band, and several bands of WCDMA / LTE. The DPLL improves a close-in noise by 17 dB compared with the conventional count-assisted locking, which causes glitch error substantially. The phase error is less than 3.0 degrees in all bands for various conditions. The faraway phase noise is -165dBc/Hz at 20MHz, -161dBc/Hz at 190MHz, and -158dBc/Hz at 120MHz in each TX output, respectively.
Keywords :
digital control; digital phase locked loops; oscillators; phase detectors; phase noise; radio transmitters; DCO; DPLL; GSM quad-band; WCDMA-LTE band; close-in noise; count-assisted locking; digital controlled oscillator; digital phase locked loop; frequency 120 MHz; glitch compensation; glitch error; multimode-multiband SAW-less transmitter; noise figure 17 dB; phase detector; phase error; phase noise; two-step closed-locking technique; Clocks; Detectors; GSM; Noise; Phase frequency detector; Radiation detectors; Timing;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2012 IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4673-1555-5
Electronic_ISBN :
0886-5930
DOI :
10.1109/CICC.2012.6330662
