• DocumentCode
    1806528
  • Title

    Failure Probability and Fault Observability of SRAM-FPGA Systems

  • Author

    Bernardeschi, Cinzia ; Cassano, Luca ; Domenici, Andrea

  • Author_Institution
    Dept. of Inf. Eng., Univ. of Pisa, Pisa, Italy
  • fYear
    2011
  • fDate
    5-7 Sept. 2011
  • Firstpage
    385
  • Lastpage
    388
  • Abstract
    We describe a simulation-based fault injection technique for failure probability and fault observability assessment of SRAM-FPGA systems. Our approach relies on a model of FPGA netlists realised with the Stochastic Activity Networks formalism. Faults can be injected into the model either stochastically or exhaustively one at a time. Fault propagation is traced to the output pins, using a four-valued logic that enables faulty signals to be tagged and recognized. We considered some of the ITC´99 benchmarks as examples.
  • Keywords
    SRAM chips; failure analysis; field programmable gate arrays; multivalued logic; probability; stochastic processes; FPGA netlists; SRAM-FPGA system; failure probability; fault observability assessment; four-valued logic; simulation-based fault injection technique; stochastic activity networks formalism; Circuit faults; Clocks; Field programmable gate arrays; Logic gates; Observability; Storage area networks; Table lookup; Fault Injection; Simulation; Single Event Transient; Single Event Upset;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications (FPL), 2011 International Conference on
  • Conference_Location
    Chania
  • Print_ISBN
    978-1-4577-1484-9
  • Electronic_ISBN
    978-0-7695-4529-5
  • Type

    conf

  • DOI
    10.1109/FPL.2011.75
  • Filename
    6044848