DocumentCode :
1806726
Title :
Novel and Highly Efficient Reconfigurable Implementation of Data Mining Classification Tree
Author :
Chrysos, G. ; Dagritzikos, P. ; Papaefstathiou, I. ; Dollas, A.
Author_Institution :
Dept. of Electron. & Comput. Eng., Lechnical Univ. of Crete, Chania, Greece
fYear :
2011
fDate :
5-7 Sept. 2011
Firstpage :
411
Lastpage :
416
Abstract :
The available e-data throughout the Web are growing at such a high rate that data mining on the web is considered the biggest challenge of information technology. As a result it is crucial to find new and innovative ways for classifying and mining those huge amounts of data. In this paper we present an implementation of a state-of-the-art data mining algorithm on a modern FPGA. This is one of the first approaches utilizing the resources of an FPGA to accelerate certain very CPU intensive data-mining/data classification schemes and our real-world results from actual runs on hardware demonstrate that it is a highly promising one. In particular, our FPGA-based system achieves, depending on the data classified, a speedup from 4x and up to 50x (on average 25x) when compared with a state-of-the art multi-core CPU, including I/O overhead.
Keywords :
data mining; decision trees; field programmable gate arrays; pattern classification; CPU; FPGA; World Wide Web; data classification; data mining; decision tree classification; e-data; information technology; Classification algorithms; Computer architecture; Data mining; Decision trees; Field programmable gate arrays; Software; Software algorithms; Decision Tree Classification (DTC); Reconfigurable architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2011 International Conference on
Conference_Location :
Chania
Print_ISBN :
978-1-4577-1484-9
Type :
conf
DOI :
10.1109/FPL.2011.82
Filename :
6044855
Link To Document :
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