Title :
VLSI design of the shuffle-exchange network for 2D fast transforms
Author :
Kuei-Ann Wen ; Po-Wen Cheng
Author_Institution :
National Chiao Tung University
Keywords :
Arithmetic; Circuit simulation; Costs; Delay; Discrete cosine transforms; Hardware; Pipelines; Throughput; Transform coding; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
IEEE
Print_ISBN :
0-7803-1281-3
