DocumentCode :
180751
Title :
Split-fabrication obfuscation: Metrics and techniques
Author :
Jagasivamani, Meenatchi ; Gadfort, P. ; Sika, Michel ; Bajura, Michael ; Fritze, Michael
Author_Institution :
Inf. Sci. Inst., Univ. of Southern California, Arlington, VA, USA
fYear :
2014
fDate :
6-7 May 2014
Firstpage :
7
Lastpage :
12
Abstract :
Split-fabrication has been proposed as an approach for secure and trusted access to advanced microelectronics manufacturing capability using un-trusted sources. Each wafer to be manufactured is processed by two semiconductor foundries, combining the front-end capabilities of an advanced but untrusted semiconductor foundry with the back-end capabilities a trusted semiconductor foundry. Since the security of split fabrication relates directly to a front-end foundry´s ability to interpret the partial circuit designs it receives, metrics are needed to evaluate the obfuscation of these designs as well as circuit design techniques to alter these metrics. This paper quantitatively examines several “front-end” obfuscation techniques and metrics inspired by information theory, and evaluates their impact on design effort, area, and performance penalties.
Keywords :
integrated circuits; network synthesis; semiconductor technology; circuit design techniques; front-end obfuscation techniques; microelectronics manufacturing; partial circuit designs; semiconductor foundries; split-fabrication obfuscation; Entropy; Foundries; Libraries; Logic gates; Manufacturing; Measurement; Standards;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Hardware-Oriented Security and Trust (HOST), 2014 IEEE International Symposium on
Conference_Location :
Arlington, VA
Print_ISBN :
978-1-4799-4114-8
Type :
conf
DOI :
10.1109/HST.2014.6855560
Filename :
6855560
Link To Document :
بازگشت