Title :
Input isolated sense amplifiers
Author :
Huang, Hong-Yi ; Chen, Shih-Lun
Author_Institution :
Dept. of Electron. Eng., Fu-Jen Univ., Taiwan
Abstract :
The paper describes new types of sense amplifiers called the input isolated sense amplifier (IISA) for high-speed VLSI applications. The inputs of the sense amplifier are isolated from the incoming signals during the operation. The IISA has totally two positive feedback paths to the inputs and outputs nodes, respectively. Thus the voltage gain can be largely increased In this work, the IISA is used as the receiver of the long interconnection to reduce the RC delay in deep sub-micron process. The simulation in a 0.35-μm CMOS process shows that the novel design has 31-58% delay improvement compared to the prior arts. The IISA can also be applied to the memory design and the receiving of large capacitive load signals.
Keywords :
CMOS logic circuits; CMOS memory circuits; VLSI; delays; differential amplifiers; feedback amplifiers; high-speed integrated circuits; 0.35 micron; CMOS process; RC delay reduction; delay improvement; high-speed VLSI applications; input isolated sense amplifier; large capacitive load signals; long interconnection receiver; memory design; positive feedback paths; Delay effects; Driver circuits; Feedback; Integrated circuit interconnections; Laboratories; MOSFETs; Operational amplifiers; Very large scale integration; Voltage; Wire;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010524