Title :
Graphene RF transistors with buried bottom gate
Author :
Dong-Wook Park ; Tzu-Hsuan Chang ; Mikael, Solomon ; Jung-Hun Seo ; Nealey, P.F. ; Zhenqiang Ma
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Wisconsin-Madison, Madison, WI, USA
Abstract :
To improve process induced mobility degradation of graphene, radio frequency (RF) transistors with buried bottom gates have been fabricated and characterized. In this process, graphene is transferred to the top of finished gates and source/drains as almost the very last step of the entire fabrication process. A unit graphene transistor shows the on-current of 130 μA/μm the Ion/Ioff ratio of 5.31, and the maximum transconductance of 6.85μS/μm at VD= 0.1 V. The graphene RF transistor with a channel length of 600 nm shows a maximum oscillation frequency (fmax) of 13 GHz and a cut-off frequency (fT) of 2 GHz after de-embedding. The higher fmax than fT is due to less source-drain resistance (RDS) made by a fully-covered channel region by the buried gate. Because of the higher fmax the proposed device structure can be a promising candidate for graphene RF transistors and RF amplifiers.
Keywords :
MOSFET; graphene; radiofrequency amplifiers; radiofrequency integrated circuits; C; RF amplifiers; buried bottom gate; finished gates; frequency 13 GHz; frequency 2 GHz; fully-covered channel region; graphene RF transistors; oscillation frequency; process induced mobility degradation; radiofrequency transistors; size 600 nm; source-drain resistance; transconductance; unit graphene transistor; Dielectrics; Graphene; Logic gates; Radio frequency; Silicon; Substrates; Transistors; Graphene; RF transistor; bottom gate; buried gate; graphene after source/drain;
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2013 IEEE 13th Topical Meeting on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-1552-4
Electronic_ISBN :
978-1-4673-1551-7
DOI :
10.1109/SiRF.2013.6489440