Title :
Economy of Scale Effects for Large Wafer Fabs
Author_Institution :
Inst. of Appl. Comput. Sci., Dresden Univ. of Technol.
Abstract :
In this paper, we present the results of a simulation study for semiconductor wafer fabrication facilities (wafer fabs) where we multiplied the number of tools per tool group and the number of operators. We were interested in the effects on the product cycle times when we keep the fab utilization constant while increasing the size of the tool groups by constant factors, i.e., forming so-called giga fabs. It turns out, that the drop in cycle time is considerable
Keywords :
integrated circuit manufacture; production equipment; production facilities; fabrication utilization; giga fabrication; product cycle times; semiconductor wafer fabrication facilities; tool groups; Capacity planning; Computational modeling; Computer science; Computer simulation; Economies of scale; Fabrication; Production facilities; Semiconductor device manufacture; Semiconductor device modeling; Testing;
Conference_Titel :
Simulation Conference, 2006. WSC 06. Proceedings of the Winter
Conference_Location :
Monterey, CA
Print_ISBN :
1-4244-0500-9
Electronic_ISBN :
1-4244-0501-7
DOI :
10.1109/WSC.2006.322960
