Title :
A 7-bit 18th order 9.6 GS/s FIR filter for high data rate 60-GHz wireless communications
Author :
Muller, Jonathan ; Stefanelli, Bruno ; Frappe, Antoine ; Ye, Lu ; Cathelin, Andreia ; Niknejad, Ali ; Kaiser, Andreas
Abstract :
This paper presents the design and measurements of a 4× oversampled 18th order digital low-pass FIR filter aimed at replacing all analog baseband filters in a 60 GHz high data-rate wireless communication transmitter. Pipeline CPL adders and TSPC flip-flops are used to enable a very high output sample rate. The filter area is 0.1mm2 in a standard 65nm CMOS process. The interpolator has been designed to work at 10 GS/s. Measurements can be performed up-to 9.6 GHz on a 1.4V supply voltage and the filter consumes 400 mW.
Keywords :
CMOS digital integrated circuits; FIR filters; adders; flip-flops; low-pass filters; radio transmitters; CMOS process; TSPC flip-flops; digital low-pass FIR filter; frequency 60 GHz; high data-rate wireless communication transmitter; pipeline CPL adders; power 400 mW; voltage 1.4 V; Active filters; CMOS integrated circuits; Clocks; Finite impulse response filter; Flip-flops; OFDM; Passive filters;
Conference_Titel :
ESSCIRC (ESSCIRC), 2011 Proceedings of the
Conference_Location :
Helsinki
Print_ISBN :
978-1-4577-0703-2
Electronic_ISBN :
1930-8833
DOI :
10.1109/ESSCIRC.2011.6044916
