DocumentCode
1808415
Title
Universal pin electronics BIT application
Author
Jackson, P. ; Parker, Les
Author_Institution
Giordano Associates Inc., Pine Brook, NJ, USA
fYear
1988
fDate
4-6 Oct 1988
Firstpage
217
Lastpage
221
Abstract
The concept of universal pin electronics (UPE), i.e. digital and analog stimuli and measurement capability in each test channel, has been discussed for some years. The advantages of this tester-per-pin architecture are well known; they include higher speed, reduced size and cost, and test program preparation savings. Standardized chip sets have been built to optimize advantages in size, weight, and cost. One such five-chip set has been thoroughly tested and is fully operational. Current efforts should reduce this five-chip set to a three-chip set during 1988; an even further reduction into a single-chip per channel is now possible. The evolution of UPE technology is discussed, including its possible applications for built-in test
Keywords
automatic test equipment; automatic testing; computer architecture; electronic equipment testing; microprocessor chips; 1988; ATE; BIT; automatic testing; cost; five-chip set; size; speed; tester-per-pin architecture; three-chip set; universal pin electronics; CMOS technology; Circuit testing; Cost function; Electronic equipment testing; Memory management; Microcontrollers; Performance evaluation; Semiconductor device measurement; Signal generators; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
AUTOTESTCON '88. IEEE International Automatic Testing Conference, Futuretest. Symposium Proceedings
Conference_Location
Minneapolis, MN
Type
conf
DOI
10.1109/AUTEST.1988.9613
Filename
9613
Link To Document