DocumentCode
1808517
Title
Heuristic assignment-driven scheduling for data-path synthesis
Author
Ohashi, Koji ; Kaneko, Mineo
Author_Institution
Sch. of Inf. Sci., Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
Volume
4
fYear
2002
fDate
2002
Abstract
This paper treats a loop pipeline scheduling problem under given resource assignment (operations to functional units and data to registers), which is one of the key tasks in design backtracking or in an assignment-driven approach for datapath synthesis. First we transform our scheduling problem into the problem of assigning integers to disjunctive arcs introduced to resolve lifetime collisions. After evaluating a feasible range of each variable to be fixed, we propose an heuristic method to reduce these ranges based on the sensitivity to iteration period so that every variable falls into an integer. Finally, our scheduler is incorporated into a Simulated Annealing exploration of assignment solution space, and data-path designs with an emphasis on connectivity minimization are demonstrated.
Keywords
backtracking; directed graphs; high level synthesis; pipeline processing; processor scheduling; resource allocation; simulated annealing; assignment solution space; connectivity minimization; data-path synthesis; design backtracking; directed graph; disjunctive arcs; heuristic assignment-driven scheduling; integer assignment; iteration period sensitivity; lifetime collision resolution; loop pipeline scheduling problem; resource assignment; simulated annealing exploration; Annealing; Artificial intelligence; Energy consumption; Information science; Job shop scheduling; Pipelines; Testing; Very large scale integration; Virtual colonoscopy; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN
0-7803-7448-7
Type
conf
DOI
10.1109/ISCAS.2002.1010553
Filename
1010553
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