DocumentCode :
1809001
Title :
A linear phase detector for arbitrary clock signals
Author :
Renaud, Mathieu ; Savaria, Yvon
Author_Institution :
Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada
Volume :
4
fYear :
2002
fDate :
2002
Abstract :
A new phase detector is proposed and analyzed. Its linear differential structure leads to significant advantages such as the absence of a dead zone, an insensitivity to common mode noise on input signals, a low switching activity that reduces noise and power dissipation, and finally, a good acquisition behaviour. The proposed detector can detect phase differences between various signals selected from a broad class of clock signal waveform types. Moreover it has a very low phase offset, in spite of process variations. Results presented in this paper show that the proposed detector can cover a wide range of frequencies that reaches up to 2 GHz when implemented with TSMC 0.35 micron CMOS. The detector remains accurate up to the highest experimental frequencies. Its simple topology uses only 26 MOS transistors, most of which can be of minimum size.
Keywords :
CMOS integrated circuits; frequency synthesizers; integrated circuit noise; low-power electronics; phase detectors; phase locked loops; 0.35 micron; 20 MHz to 2 GHz; CMOS; PLL; acquisition behaviour; arbitrary clock signals; common mode noise; frequency synthesiser; linear differential structure; linear phase detector; phase differences; phase offset; power dissipation; process variations; switching activity; Capacitance; Clocks; Detectors; Frequency conversion; Frequency synthesizers; Partial discharges; Phase detection; Phase locked loops; Phase noise; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
Type :
conf
DOI :
10.1109/ISCAS.2002.1010572
Filename :
1010572
Link To Document :
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