A Resizing Method to Minimize Effects of Hardware Trojans

Due to emerging threats of hardware Trojan insertion, many techniques to detect Trojans and protect the original design have been developed. However, an intelligent adversary is expected to be aware of every state-of-the-art detection technique and develop new countermeasures to make a majority of these obsolete. In this paper, we propose and analyze a new attack scenario that targets every known non-destructive detection method and imposes negligible impact on every measurable circuit parameter. We start by introducing our key ideas for hiding the delay impact of the Trojan via gate resizing. The gate resizing problem is then formulated and implemented. Our method redesigns the circuit at minimal cost without affecting the functionality of the circuit, can be applied in conjunction with any other attack scenario, and maintains its benefit independent of the type and functionality of Trojan circuitry. Finally, via extensive experiments on benchmarks we demonstrate that our method greatly increases the difficulty of detecting Trojans via any combination of delay, current, and power measurements and has very small area overhead.