DocumentCode :
180925
Title :
On-Chip Monitoring for In-Place Diagnosis of Undesired Power Domain Problems in IC Chips
Author :
Nagata, M. ; Fujimoto, Daisuke ; Miura, Naruhisa
Author_Institution :
Grad. Sch. of Syst. Inf., Kobe Univ., Kobe, Japan
fYear :
2014
fDate :
16-19 Nov. 2014
Firstpage :
258
Lastpage :
262
Abstract :
An on-chip monitoring technique has realized in place diagnosis of power noise problems. On-chip voltage noise monitor (OCM) circuits are overviewed with some examples of integration in silicon chips. The OCM captures power noise waveforms in a silicon chip and provides the opportunities of diagnosis on unfavorable invisible events within a die. In-band interference of radio-frequency (RF) communication channels by power noise coupling in RF systems-on-chip (SoC) integration, and information leakage through power noise side channels from a cryptographic core are demonstrated.
Keywords :
fault diagnosis; integrated circuit noise; integrated circuit testing; logic testing; system-on-chip; IC chips; RF systems-on-chip integration; cryptographic core; in-band interference; in-place diagnosis; information leakage; on-chip monitoring; on-chip voltage noise monitor circuits; power noise coupling; power noise problems; power noise side channels; power noise waveforms; radio-frequency communication channels; silicon chips; undesired power domain problems; unfavorable invisible events; Monitoring; Noise; Noise measurement; Radio frequency; Substrates; System-on-chip; Wireless communication; Electromagnetic Compatibility; Power Integrity; Side channel information leakage; Signal Integrity; Substrate coupling noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ATS), 2014 IEEE 23rd Asian
Conference_Location :
Hangzhou
ISSN :
1081-7735
Type :
conf
DOI :
10.1109/ATS.2014.55
Filename :
6979110
Link To Document :
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