DocumentCode :
1810058
Title :
Fault-tolerant routing in unique-path multistage interconnection networks
Author :
Sadawarti, Harsh ; Bansal, P.K.
Author_Institution :
Dept. of Comput. Sci. & Eng., RIMT-Inst. of Eng. & Technol., Mandi Gobindgarh, India
fYear :
2004
fDate :
20-22 Dec. 2004
Firstpage :
427
Lastpage :
430
Abstract :
Two pass routing scheme is described for communication in a multiprocessor system employing a unique-path multistage interconnection network in the presence of faults in the network. It is capable of tolerating all single faults and many multiple faults in all except the first and last stages of the network. The routing scheme is useful for tolerating both permanent as well as intermittent faults in the network. The hardware over head for implementing the scheme is very small and no time-penalty is paid in the fault-free case.
Keywords :
fault tolerant computing; multiprocessing systems; multistage interconnection networks; network routing; parallel processing; fault-tolerant routing; multiprocessor system; parallel processing; unique-path multistage interconnection network; Costs; Doped fiber amplifiers; Fault tolerance; Intelligent networks; Joining processes; Multiprocessing systems; Multiprocessor interconnection networks; Parallel processing; Routing; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
India Annual Conference, 2004. Proceedings of the IEEE INDICON 2004. First
Print_ISBN :
0-7803-8909-3
Type :
conf
DOI :
10.1109/INDICO.2004.1497788
Filename :
1497788
Link To Document :
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